Exact relationship
I2C pullup resistor designer
Calculate the feasible I2C pullup-resistance interval from supply voltage, low-level sink limits, bus capacitance, and rise-time limit.
Engine category
Published tools in this category solve distinct design decisions. Each keeps its assumptions, limits, and next decision visible.
Exact relationship
Calculate the feasible I2C pullup-resistance interval from supply voltage, low-level sink limits, bus capacitance, and rise-time limit.
Exact ideal relationship
Calculate high and low noise margins between a driver's guaranteed output levels and a receiver's input thresholds.
Decision comparison
Check whether an N-channel MOSFET bidirectional level shifter's threshold voltage leaves margin at the lower of two supplies.
Exact ideal relationship
Calculate simplified full-cycle SPI setup margin from clock period, output delay, flight time, setup requirement, and skew.
Exact ideal relationship
Calculate actual UART baud rate and percentage error from clock frequency, oversampling, and divider register value.
Exact ideal relationship
Calculate the ideal DC equivalent load of two parallel CAN bus end terminations.
Standard approximation
Calculate idle bias current and termination voltage for a series RS-485 failsafe bias and termination network.
Exact ideal relationship
Calculate total GPIO group current and arithmetic margin against a stated group current limit.
Exact ideal relationship
Calculate the ideal resistive divider ratio and top resistor to map a source voltage range into an ADC input range.
Exact ideal relationship
Calculate ideal edge-aligned PWM frequency, duty steps, and effective duty resolution from timer clock, prescaler, and counter top.
Exact ideal relationship
Calculate ideal RC reset-node time constant and the fraction of final value reached at a stated elapsed time.
Exact ideal relationship
Calculate the maximum pull resistor value allowed by worst-case leakage current and a maximum tolerated logic-node voltage rise.