PCB and Transmission Lines
Model class: Standard approximation
Microstrip impedance estimator
Estimate outer-layer single-ended microstrip impedance from trace width, dielectric height, and relative permittivity.
Interactive engine
Start with the stated conditions.
Values stay in this browser. Choose a representative scenario, then calculate deliberately.
Example ready
Calculate to inspect the result.
The result will identify the direct answer, assumptions, and any warning that changes the next decision.
Assumptions to check
- Outer-layer single-ended microstrip.
- A uniform dielectric and continuous reference plane.
- Copper thickness, solder mask, weave, and fabrication variation are omitted.
Stackup values matter more than a nominal FR-4 label
Microstrip impedance depends on geometry and effective permittivity. The closed-form estimate makes width-to-height ratio and dielectric assumptions visible, which is useful before discussing a target with a fabricator.
The calculation is deliberately labeled as a first-pass estimate. Fabrication stackups, copper thickness, solder mask, resin content, glass weave, and tolerance can move the delivered impedance enough to matter.
Use the result to start a handoff
An estimated value does not establish controlled impedance. Keep the requested impedance, tolerance, layer, reference, material, and finished copper details with the fabricator, then validate the actual board where the design requires it.
Use the estimate as a fabricator conversation starter
The width-to-height ratio and dielectric constant provide a useful early impedance estimate, but a board stackup is a manufactured object. Ask for the actual dielectric height after pressing, the finished copper thickness, the applicable material data, solder-mask treatment, target impedance, and tolerance. A generic FR-4 value is not enough for a committed controlled-impedance requirement, especially where frequency, edge rate, or interconnect length makes mismatch material.
Also check that the signal keeps a continuous reference path through connectors, layer transitions, and plane changes. The single-ended microstrip equation does not model differential coupling, via stubs, launches, bend geometry, return-path discontinuity, or fabrication variation. Use the actual fabricator stackup and field solver for a released width, then validate the delivered interconnect by the method appropriate to the speed and risk. Record whether the requested impedance is nominal, minimum, maximum, or tolerance controlled. Include the target frequency or edge-rate context. Capture fabrication tolerance too.
Common mistakes
- Using nominal material permittivity as a finished-stackup guarantee.
- Ignoring return-path continuity.
- Treating a closed-form result as fabrication approval.
Model limit and handoff
Confirm the target with the actual fabricator stackup, controlled-impedance process, field solver, and suitable measurement.
FAQs
Why is this always flagged?
The warning is intentional because the omitted stackup and fabrication conditions can materially change a real trace.